Find Job -ASIC Verification Engineers (System verilog)-JOBDRAG

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Job Description	:	Proficiency in one or more HVL's a must (System Verilog). Strong domain knowledge on one or more - PCIe , USB, Etheet, ARM, AHB/AXI, AMBA. Should have worked on ASIC verification on at least one project with constrained random methodology (UVM/VMM/OVM). Must be expert in building a verification env with any of the above methodology, writing and debugging test cases. Good in concepts Code coverage and functional coverage. Expertise in Verilog and / or VHDL is desired Interested Candidate in this opportunity can send the resume atnirmalav@mirafra.com
Desired Profile	:	Proficiency in one or more HVL\'s a must (System Verilog).Strong domain knowledge on one or more - PCIe , USB, Etheet, ARM, AHB/AXI, AMBA.Should have worked on ASIC verification on at least one project with constrained random methodology (UVM/VMM/OVM). Must be expert in building a verification env with any of the above methodology, writing and debugging test cases. Good in concepts Code coverage and functional coverage. Expertise in Verilog and / or VHDL is desired
Key Skills	:	VERIFICATION,SV,SPECMAN,ARM PROCESSOR