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Job Description	:	Block microarchitecture and design - Logic Design - Synthesis - SDC generation - Static Timing Scripts Skills/Experience - Hands on logic design experience - Good at writing HDL models, Verilog or VHLD - Working knowledge of logic simulators (Verilog-XL, VCS, etc)
Desired Profile	:	We are currently looking for RTL DESIGN ENGINEERS with 2 to 5 Years of EXP for Bangalore Location.Interested Candidates mail their resumes to nirmalav@mirafra.com Responsibilities Work with the team to design key sections of a cutting edge SoC. - Block microarchitecture and design - Logic Design - Synthesis - SDC generation - Static Timing Scripts Skills/Experience - Hands on logic design experience - Good at writing HDL models, Verilog or VHLD - Working knowledge of logic simulators (Verilog-XL, VCS, etc)
Key Skills	:	RTL Design Engineer